Stereoscopic 3 dimension video broadcasting apparatus and method thereof

ABSTRACT

Disclosed are an apparatus and a method for broadcasting a stereoscopic 3D video. According to an exemplary embodiment of the present invention, since the LLR operation of each of the HP bitstream and the LP bitstream is provided by the four fundamental arithmetic operations through the logarization for the probability that a video bit for the reception symbol vector is to be transmitted, the operation complexity of the HP bitstream LLR and the LP bitstream LLR is lowered. A high-quality stereoscopic video can be displayed and the left video bitstream is updated by providing the prior bitstream of the left video to the first SISO decoder, thereby improving reliability of the decoding for the left video.

BACKGROUND OF THE INVENTION Field of the Invention

The present invention relates to an apparatus and a method forbroadcasting a stereoscopic 3D video, and more specifically, to atechnique to processing speed and time for acquiring a high-quality 3Dvideo by lowering complexity of a reception symbol vector log likelihoodration (LLR) operation in an iterative channel decoding process foracquiring the high-quality 3D video using a hierarchical IL-FEC method.

Description of the Related Art

In a wireless broadcasting system, reception quality of variousreceivers distributed in a wide range may be significantly various. Forexample, some applications tend to be received by mobile receivers andfixed receivers. Further, it is sometimes preferable to perform a localservice insertion (LSI) inserting local content into some cells withoutinfluencing national content during broadcasting. A hierarchicalmodulation adopted as a broadcasting standard such as Digital VideoBroadcasting-Terrestrial (DVB-T) and Digital Video Broadcasting-NextGeneration Handheld (DVB-NGH) may be used in applications transmittingtwo bits as the same signal.

For example, the hierarchical modulation may be used for transmittingcontent having various definitions such as standard definition (SD),high definition (HD), or ultra-high definition (UHD). Thehigh-definition content is transmitted by mapping high priority (HP)bits and low priority (LP) bits and modulating a hierarchical 16 QAM.

In this case, the broadcasting standard defines a plurality ofhierarchical values α and a service provider may select a value suitablefor the provided application from the hierarchical values α. Forexample, the DVB-T allows a service provider to select the value α of 1,2, or 4, while the DVB-NGH allows the service provider to select thevalue α of 1, 2, 3, or 4. The value α affects an inter-streaminterference level and affects a trade-off between throughput gain anddegradation of performance. Typically, a set of hierarchical values α isprovided to each application in use. The hierarchical value α is animportant element for acquiring a high-quality 3D video and it isnecessary to acquire the hierarchical value α suitable thereto.

In a process of de-mapping a symbol vector received from a destinationnode receiving the hierarchical-modulated symbol vector on the basis ofthe appropriate hierarchical value α for iterative channel decoding,there is a disadvantage in that the LLR operation complexity of each ofthe HP stream and the LP bit is large.

As a result, the applicant of the present invention proposes a methodfor reducing the processing time and speed of the iterative channeldecoding at the rear end by reducing the LLR operation complexity ofeach of the HP stream and the LP bit.

SUMMARY OF THE INVENTION

In order to solve the problems in the related art, an object of thepresent invention is to provide an apparatus and a method forbroadcasting a stereoscopic 3D video capable of shortening processingtime and speed of iterative channel decoding performing iterativedecoding to improve BER performance by reducing operation complexity ofa HP bit LLR and a LP bit LLR of a reception symbol vector.

Another object of the present invention is to provide an apparatus and amethod for broadcasting a stereoscopic 3D video capable of improvingreliability of decoding by updating the HP bitstream during iterativechannel decoding.

Yet another object of the present invention is to provide an apparatusand a method for broadcasting a stereoscopic 3D video capable ofdisplaying a high-quality 3D video on a screen by acquiring anappropriate hierarchical value in an iterative channel decoding processin which hierarchical modulation is combined with hierarchical 16QAM.

Objects of the present invention are not limited to the aforementionedobjects, and other objects and advantages of the present invention,which are not mentioned, can be appreciated by the following descriptionand will be more apparently known by the exemplary embodiments of thepresent invention. Further, it can be easily understood that the objectsand advantages of the present invention may be implemented by meansillustrated in claims and combinations thereof.

According to an aspect of the present invention, there is provided anapparatus for broadcasting a stereoscopic 3D video including: a sourcenode that transmits a left video and a right video collected by aplurality of cameras in a transmission symbol vector form by performing16QAM modulation and hierarchical modulation based on hierarchicalvalues set from a predetermined model after compressing the left videoand the right video; and a destination node that acquires the left videoand the right video by performing iterative channel decoding afterperforming hierarchical 16QAM de-mapping based on a predeterminedhierarchical value and transmits the acquired left and right videos to adisplay device with respect to a reception symbol vector in whichGaussian noise is added to the transmission symbol vector at the sourcenode side.

Preferably, the source node may include an IL-FEC channel encoding unitthat generates a combined video bitstream b₁₂ by combining compressedleft video bitstream b₁ and right video bitstream b₂ of NAL units andperforming an exclusive OR operation with respect to the left video V₁and the right video V₂ collected through the plurality of cameras; anRSC encoding unit including a plurality of RSC encoders that outputparity bitstreams P₁ and P₂ of the left video and the right video byperforming RSC encoding for the compressed left video bitstream andright video bitstream; a concatenate vector generation module thatgenerates a codeword bitstream c₁ of the left video and a codewordbitstream c₁₂ of the combined video by concatenating the left videobitstream b₁, the right video bitstream b₂, the parity bitstream P₂ ofthe right video, and the combined video bitstream b₁₂ and outputs thegenerated codeword bitstream c₁ of the left video and codeword bitstreamc₁₂ of the combined video to a HP bitstream and a LP bitstream,respectively; and a hierarchical 16QAM mapping module that maps thereceived HP bitstream and LP bitstream after performing both 16 QAM andhierarchical modulation based on the hierarchical value set from thepredetermined model to transmit the mapped HP bitstream and LP bitstreamto the destination node in a transmission symbol vector form.

Preferably, the IL-FEC channel encoding unit may include an interleaverthat combines the compressed left video bitstream and right videobitstream; and an exclusive OR operator that outputs a combined videobitstream by operating an exclusive OR with respect to the outputbitstream and the right video bitstream of the interleaver.

Preferably, the destination node may include a hierarchical 16QAMde-mapper that acquires the hierarchical value and performs thehierarchical 16QAM de-mapping based on the acquired hierarchical value,and then outputs a left video bitstream LLR, a parity bitstream LLR, acombined video bitstream LLR and a parity bitstream LLR by operating theHP codeword bitstream LLR and the LP codeword bit stream LLR, withrespect to the reception symbol vector in which Gaussian noise is addedto the transmission symbol vector of the source node side, respectively;an iterative channel decoder that acquires a left video stream and aright video stream by performing a predetermined number of iterativechannel decoding with respect to the generated left video bitstream LLR,parity bitstream LLR, combined video bitstream LLR and parity bitstreamLLR; and an encoding unit including a plurality of encoders thattransmits a left video and a right video to a display device aftercompressing and encoding the acquired left and right video bitstreams,respectively.

Preferably, in the hierarchical 16QAM de-mapper, each operation relationof a LP codeword bitstream LLR and a HP codeword bitstream LLR, drawnthrough logarization for the probability that the received receptionsymbol vector is to be transmitted, is provided by the four fundamentalarithmetic operations, in order to reduce operation complexity of the LPcodeword bitstream LLR and the HP codeword bitstream LLR.

Preferably, the iterative channel decoder may include a first SISOdecoder that generates an additional bitstream LLR by performing softdecoding by inputting the left video bitstream LLR and the paritybitstream LLR and outputs the left video bitstream; an interleaver thatoutputs an interleaved additional bitstream LLR by rearranging asequence of the additional bitstream LLR of the first SISO decoder; afirst LLR operator that generates a prior bitstream of the right videoby combining the interleaved additional bitstream and the combined videobitstream as the input based on the LLR; a second SISO decoder thatgenerates an additional bitstream of the left video and outputs theright video bitstream by soft decoding the prior bitstream of the rightvideo and the parity bitstream of the combined video of the first LLRoperator as the input; a second LLR operator that generates anadditional bitstream of the left video by combining the additionalbitstream of the right video of the second SISIO decoder and thecombined video bitstream based on the LLR; a deinterleaver thatgenerates a prior bitstream of the left video through deinterleaving andexclusive OR operation with respect to the additional bitstream of theleft video; and an exclusive OR operator that updates the left videobitstream by providing the prior bitstream of the left video of thedeinterleaver to the first SISO decoder through the exclusive ORoperation to improve reliability of the decoding for the left video.

Preferably, the hierarchical value may be provided to acquire bit errorrate (BER) performance based on noise for each predeterminedhierarchical value of left and right video bitstreams output from thefirst and second SISO decoders of the iterative channel decoder, set ahierarchical value having the acquired low BER performance, draw anaverage PSNR for each of the left video bitstream and the right videobitstream reconfigured based on the predetermined hierarchical value,and acquire, as the appropriate hierarchical value, a hierarchical valuein which a sum of the drawn left video bitstream and right videobitstream exceeds a predetermined target average PSNR and each averagePSNR has a predetermined minimum required PSNR.

According to another aspect of the present invention, there is providedan apparatus for broadcasting a stereoscopic 3D video including: anIL-FEC channel encoding unit that generates a combined video bitstreamb₁₂ by combining compressed left video bitstream b₁ and right videobitstream b₂ of NAL units and performing an exclusive OR operation withrespect to the left video V₁ and the right video V₂ collected throughthe plurality of cameras; an RSC encoding unit including a plurality ofRSC encoders that output parity bitstreams P₁ and P₂ of the left videoand the right video by performing RSC encoding for the compressed leftvideo bitstream and right video bitstream, respectively; a concatenatevector generation module that generates a codeword bitstream c₁ of theleft video and a codeword bitstream c₁₂ of the combined video byconcatenating the left video bitstream b₁, the right video bitstream b₂,the parity bitstream P₂ of the right video, and the combined videobitstream b₁₂ and outputs the generated codeword bitstream c₁ of theleft video and codeword bitstream c₁₂ of the combined video to a HPbitstream and a LP bitstream, respectively; and a hierarchical 16QAMmapping module that maps the received HP bitstream and LP bitstreamafter performing both 16 QAM and hierarchical modulation based on thehierarchical value set from the predetermined model to transmit themapped HP bitstream and LP bitstream to the destination node in atransmission symbol vector form.

Preferably, the IL-FEC channel encoding unit may include an interleaverthat combines the compressed left video bitstream and right videobitstream; and an exclusive OR operator that outputs a combined videobitstream by operating an exclusive OR with respect to the outputbitstream and the right video bitstream of the interleaver.

According to yet another aspect of the present invention, there isprovided an apparatus for broadcasting a stereoscopic 3D videoincluding: a hierarchical 16QAM de-mapper that acquires an appropriatehierarchical value, performs the hierarchical 16QAM de-mapping based onthe acquired hierarchical value, with respect to the reception symbolvector, and then outputs a left video bitstream LLR, a parity bitstreamLLR, a combined video bitstream LLR and a parity bitstream LLR byoperating the LP codeword bitstream LLR and the HP codeword bitstreamLLR, respectively; an iterative channel decoder that acquires a leftvideo stream and a right video stream by performing a predeterminednumber of iterative channel decoding with respect to the generated leftvideo bitstream LLR, parity bitstream LLR, combined video bitstream LLRand parity bitstream LLR; and an encoding unit including a plurality ofencoders that transmits a left video and a right video to a displaydevice after compressing and encoding the acquired left and right videobitstreams, respectively.

Preferably, in the hierarchical 16QAM de-mapper, each operation relationof a LP codeword bitstream LLR and a HP codeword bitstream LLR drawnthrough logarization for the probability that the received receptionsymbol vector is to be transmitted is provided by the four fundamentalarithmetic operations, in order to reduce operation complexity of the LPcodeword bitstream LLR and the HP codeword bitstream LLR.

Preferably, the iterative channel decoder may include a first SISOdecoder that generates an additional bitstream LLR by performing softdecoding by inputting the left video bitstream LLR and the paritybitstream LLR and outputs the left video bitstream; an interleaver thatoutputs an interleaved additional bitstream LLR by rearranging asequence of the additional bitstream LLR of the first SISO decoder; afirst LLR operator that generates a prior bitstream of the right videoby combining the interleaved additional bitstream and the combined videobitstream as the input based on the LLR; a second SISO decoder thatgenerates an additional bitstream of the left video and outputs theright video bitstream by soft decoding the prior bitstream of the rightvideo and the parity bitstream of the combined video of the first LLRoperator as the input; a second LLR operator that generates anadditional bitstream of the left video by combining the additionalbitstream of the right video of the second SISIO decoder and thecombined video bitstream based on the LLR; a deinterleaver thatgenerates a prior bitstream of the left video through deinterleaving andexclusive OR operation with respect to the additional bitstream of theleft video; and an exclusive OR operator that updates the left videobitstream by providing the prior bitstream of the left video of thedeinterleaver to the first SISO decoder through the exclusive ORoperation to improve reliability of the decoding for the left video.

Preferably, the hierarchical value may be provided to acquire bit errorrate (BER) performance based on noise for each predeterminedhierarchical value of left and right video bitstreams output from thefirst and second SISO decoders of the iterative channel decoder, set ahierarchical value having the acquired low BER performance, draw anaverage PSNR for each of the left video bitstream and the right videobitstream reconfigured based on the predetermined hierarchical value,and acquire, as the appropriate hierarchical value, a hierarchical valuein which a sum of the drawn left video bitstream and right videobitstream exceeds a predetermined target average PSNR and each averagePSNR has a predetermined minimum required PSNR.

According to still another aspect of the present invention, there isprovided a method for broadcasting a stereoscopic 3D video including:transmitting a left video and a right video collected by a plurality ofcameras in a transmission symbol vector form by performing 16QAMmodulation and hierarchical modulation based on hierarchical values setfrom a predetermined model after compressing the left video and theright video; and acquiring the left video and the right video byperforming iterative channel decoding after performing hierarchical16QAM de-mapping based on an appropriate hierarchical value andtransmitting the acquired left and right videos to a display device withrespect to a reception symbol vector in which Gaussian noise is added tothe transmission symbol vector at the source node side, in which theprocess of performing the hierarchical 16QAM de-mapping based on thepredetermined hierarchical value further includes providing eachoperation relation of a LP codeword bitstream LLR and a HP codewordbitstream LLR drawn through logarization for the probability that thereceived reception symbol vector is to be transmitted as the fourfundamental arithmetic operations, in order to reduce operationcomplexity of the LP codeword bitstream LLR and the HP codewordbitstream LLR.

Preferably, the iterative channel decoding process may includegenerating an additional bit stream by performing soft decoding by thefirst SISO decoder by inputting a left video bitstream and a paritybitstream; rearranging a sequence of the additional bitstream and thentransmitting the rearranged sequence to the second SISO decoder as aninput; performing soft decoding by inputting the additional bitstreamrearranged in the second SISO decoder and the parity bit; generating aprior bitstream of the left video after inverse-arranging the sequencethrough deinterleaving for the additional bitstream; and updating theleft video bitstream by providing the prior bitstream of the left videoof the deinterleaver to the first SISO decoder through an exclusive ORoperation to improve reliability of the decoding for the left video.

Preferably, the process of acquiring the appropriate hierarchical valuemay include: acquiring bit error rate (BER) performance based on noisefor each predetermined hierarchical value of left and right videobitstreams output from the first and second SISO decoders; setting ahierarchical value having the acquired low BER performance; drawing anaverage PSNR for each of the left video bitstream and the right videobitstream reconfigured based on the predetermined hierarchical value;and acquiring, as the appropriate hierarchical value, a hierarchicalvalue in which a sum of the drawn left video bitstream and right videobitstream exceeds a predetermined target average PSNR and each averagePSNR has a predetermined minimum required PSNR.

According to the present invention, the LLR operation of each of the HPbitstream and the LP bitstream is provided by the four fundamentalarithmetic operations through the logarization for the probability thata video bit for the reception symbol vector is to be transmitted,thereby lowering the operation complexity of the HP bitstream LLR andthe LP bitstream LLR and improving the de-mapping processing speed forthe reception symbol vector y.

In addition, when performing the iterative channel decoding, theiterative channel decoding is performed by acquiring, as the appropriatehierarchical value, a hierarchical value in which a sum of the drawnleft video bitstream and right video bitstream exceeds a predeterminedtarget average PSNR and each average PSNR has a predetermined minimumrequired PSNR, thereby displaying a high-quality stereoscopic video.

Further, the left video bitstream is updated by providing the priorbitstream of the left video to the first SISO decoder, thereby improvingreliability of the decoding for the left video.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects, features and other advantages of thepresent invention will be more clearly understood from the followingdetailed description taken in conjunction with the accompanyingdrawings, in which:

FIG. 1 is a diagram showing a schematic configuration of a broadcastingsystem to which an exemplary embodiment of the present invention isapplied;

FIG. 2 is a diagram illustrating a hierarchical modulation constellationaccording to the exemplary embodiment of the present invention;

FIG. 3 is an exemplary diagram showing a mapping state of hierarchical16QAM in the broadcasting system according to the exemplary embodimentof the present invention;

FIG. 4 is a diagram showing a detailed configuration of an iterativechannel decoder in the broadcasting system according to the exemplaryembodiment of the present invention;

FIG. 5 is an exemplary diagram showing a BER of each of a left video anda right video at the time of iterative decoding three times of theiterative channel decoder in the broadcasting system according to theexemplary embodiment of the present invention;

FIG. 6 is an exemplary diagram showing left, right, and average PSNRperformances when a target average PSNR and a minimum required PSNR are38 dB and 28 dB, respectively, according to the exemplary embodiment ofthe present invention;

FIG. 7 is an exemplary diagram showing average PSNR performance when atarget average PSNR is set to 38 dB and hierarchical values are set to0.5 and 0.6 according to the exemplary embodiment of the presentinvention; and

FIG. 8 is an exemplary diagram showing average PSNR performance ofE_(b)/N₀=6.1 dB when a target average PSNR is set to 33 dB andhierarchical values are set to 0.5 and 0.6 according to the exemplaryembodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Hereinafter, exemplary embodiments of the present invention will bedescribed in more detail with reference to the accompanying drawings.

Various advantages and features of the present invention and methodsaccomplishing thereof will become apparent from the followingdescription of exemplary embodiments with reference to the accompanyingdrawings. However, the present invention is not limited to the followingexemplary embodiments but may be implemented in various different forms.The exemplary embodiments are provided only to complete disclosure ofthe present invention and to fully provide a person having ordinaryskill in the art to which the present invention pertains with thecategory of the invention, and the present invention will be defined bythe appended claims.

Terms used in the present specification will be briefly described andthe present invention will be described in detail.

Terms used in the present invention adopt general terms which arecurrently widely used as possible by considering functions in thepresent invention, but the terms may be changed depending on anintention of those skilled in the art, a precedent, and emergence of newtechnology. Further, in a specific case, a term which an applicantarbitrarily selects is present and in this case, a meaning of the termwill be disclosed in detail in a corresponding description part of theinvention. Accordingly, a term used in the present invention should bedefined based on not just a name of the term but a meaning of the termand contents throughout the present invention.

Throughout the specification and the claims, unless explicitly describedto the contrary, the term “comprise” will be understood to imply theinclusion of stated elements but not the exclusion of any otherelements. In addition, a term ‘unit’ used in the specification meanssoftware or a hardware component such as FPGA or ASIC and the ‘unit’performs certain roles. However, the ‘unit’ is not a meaning limited tosoftware or hardware. The “unit’ may be configured to be positioned inan addressable storage medium and configured to regenerate one or moreprocessors.

Therefore, as one example, the ‘unit’ includes components such assoftware components, object oriented software components, classcomponents, and task components, processes, functions, attributes,procedures, subroutines, segments of a program code, drivers, firmware,a microcode, a circuit, data, a database, data structures, tables,arrays, and variables. Functions provided in the components and ‘units’may be joined as a smaller number of components and ‘units’ or furtherseparated into additional components and ‘units’.

The exemplary embodiment of the present invention will be described morefully hereinafter with reference to the accompanying drawings so thatthose skilled in the art to which the present invention pertains can beeasily implemented. In addition, a part irrelevant to the descriptionwill be omitted to clearly describe the exemplary embodiments of thepresent invention.

Hereinafter, a history according to an exemplary embodiment of thepresent invention will be described in detail with reference to theaccompanying drawings.

FIG. 1 is a diagram showing an apparatus S for processing left and rightvideo signals based on interlayer forward error correction (IL-FEC) andhierarchical quadrature amplitude modulation (16QAM) according to theexemplary embodiment of the present invention. Referring to FIG. 1, theapparatus S includes a source node 10 and a destination node 20. Thesource node 10 compresses and encodes the left and right video signalsacquired from a camera through the IL-FEC and hierarchical 16QAM mapperto transmit the compressed and encoded left and right video signals tothe destination node 20 in a transmission symbol vector x form, and thedestination node 20 may transmit a reception symbol vector y to adisplay device TV by performing iterative channel decoding.

Herein, the source node 10 may include cameras 110 and 111, H264/AVCencoders 120 and 121, an IL-FEC channel encoding unit 130, recursivesystematic convolution (RSC) encoders 140 and 141, a concatenate vectorgeneration module 150, and a hierarchical 16QAM mapping module 160.

A left video and a right video acquired from the respective cameras 110and 111 are transmitted to the H264/AVC encoders 120 and 121, and inthis case, the H264/AVC encoders 120 and 121 may compress the left videoand the right video based on a predetermined video standard compressionalgorithm.

That is, with respect of a video signal V_(k)={V_(k) ¹, V_(k) ², . . . ,V_(k) ^(i)} included in an I frame, a compressed k-th video bitstreamb_(k) is defined as b_(k)={b_(k) ¹, b_(k) ², . . . , b_(k) ^(n)} Herein,k is a positive integer, 1≤i≤I, 1≤n≤N, and n is defined by a unit of ann-th network abstraction layer (hereinafter, abbreviated as an NAL). Thevideo bitstream bk is divided into NAL units, and in this case, thetotal number N of NALs is equal to the number of compressed frames I.That is, N=I.

Accordingly, since the n-th NAL unit includes M bits (b_(k) ^(n)={b_(k)^(n) ¹ , b_(k) ^(n) ² , . . . , b_(k) ^(n) ^(m) }, n₁≤n_(m)≤n_(M)), andthe difference between the left video signal and the right video signalis small, the lengths of the left and right video bitstream b_(k) ^(n)(k=1 and 2) are equal to each other.

That is, the left video signal and the right video signal received bythe cameras 100 and 101 are transmitted to the IL-FEC channel encodingunit 130 via the H264/AVC encoders 120 and 121, respectively.

In this case, the H264/AVC encoders 120 and 121 output left and rightvideo bitstreams b₁ and b₂ by NAL units, respectively.

The IL-FEC channel encoding unit 130 may be provided by a universalmobile telecommunication system (UMPS) interleaver Π( ) (hereinafter,abbreviated as an interleaver) and an exclusive OR operator ⊕. As aresult, the IL-FEC channel encoding unit 130 outputs a combined videobitstream b₁₂ acquired by combining the left video bitstream b₁ and theright video bitstream b₂ and the combined video bitstream b₁₂ isexpressed by b₁₂=Π(b₁)⊕b₂=b₁′⊕b₂. Herein, the combined video bitstreamb₁₂ is provided as a redundancy of the left video bitstream b₁.

The left video bitstream b₁ and the combined video bitstream b₁₂ aretransmitted to the RSC encoders 140 and 141, respectively, and as aresult, the left video bitstream b₁ and the combined video bitstream b₁₂are encoded by the RSC encoders 140 and 141 to output a video bitstreamb_(k′) and a parity bitstream p_(k′). A series of processes of encodingthe left video bitstream b₁ and the combined video bitstream b₁₂ by theRSC encoders 140 and 141 may be understood by those skilled in the artrelated with the exemplary embodiment of the present invention.

In addition, the encoded parity bitstream p_(k′) and the video bitstreamb_(k′) output a codeword bitstream c_(k′) by the concatenate vectorgeneration module 150 and in this case, the codeword bitstream c_(k′) isrepresented by c_(k′)={c_(k′) ¹, c_(k′) ², . . . , c_(k′) ^(n)} (k′=1,12). That is, the codeword bitstream c_(k′) is defined as a concatenatevector between the parity bitstream p_(k′) and the video bitstreamb_(k′), the codeword bitstream c_(k′) is defined as c_(k′)=b_(k′)

p_(k′), and

is defined as a serial concatenate for the video bitstreamb_(k′)={b_(k′) ¹, b_(k′) ², . . . , b_(k′) ^(n)} and the paritybitstream p_(k′)={p_(k′) ¹, p_(k′) ², . . . , p_(k′) ^(n)}.

In addition, the encoded codeword bitstream c_(k′)={c_(k′) ¹, c_(k′) ²,. . . , c_(k′) ^(n)} is transmitted to the hierarchical 16QAM mappingmodule 160 for strong error correction and the hierarchical 16QAMmapping module 160 performs the hierarchical 16QAM mapping with respectto the codeword bitstream c₁ of the NAL unit. In this case, the codewordbitstreams c₁ and c₁₂ of the NAL unit are input to the hierarchical16QAM mapping module 160 as the HP bitstream and the LP bitstream,respectively.

FIG. 2 shows hierarchical-modulated virtual black points and actualtransmission symbol white points by the hierarchical 16QAM mappingmodule 160 shown in FIG. 1, and an actual transmission symbol vectorx_(n) _(m) is represented by Equation 1 below.

x _(n) _(m) =K{f _((α)) ¹⁶(c ₁ ^((2n) ^(m) ⁻¹⁾ ,c ₁₂ ^((2n) ^(m) ⁻¹⁾ ,c₁ ^(2n) ^(m) ,c ₁₂ ^(2n) ^(m) )}  Equation 1

Herein, x_(n) _(m) ∈x^(n)(n₁≤n_(m)≤n_(M) and 1≤n≤N) is satisfied andf_((α)) ¹⁶( ) defined as a hierarchical 16QAM mapper having ahierarchical value α=d₁′/d₂. A distance d′ from the hierarchical valueα=d₁′/d₂ satisfies d₁′=d₁/2, 2d₁ represents a distance between virtualcenter points of the quadrant, and 2d₂ represents a distance betweenactually transmitted symbols of each quadrant.

In addition, the parameter k is defined as a scaling factor with respectto an average value of average symbol energy. Herein, the videobitstream b₁ of the NAL unit, which is the left video, is defined as theHP bitstream, and the video bitstream b₂ of the NAL unit, which is theright video, is defined as the LP bitstream.

In this case, when the hierarchical value α for the HP codewordbitstream c₁ mapped with the HP bitstream is increased, the LP codewordbitstream c₁₂ mapped with the LP bitstream is decreased. Reversely, whenthe hierarchical value α for the LP codeword bitstream c₁₂ is decreased,the HP codeword bitstream c₁ is increased. As a result, a high-quality3D video may not be acquired by the increased hierarchical value α ofthe codeword c₁ due to the decrease of the LP codeword bitstream c₁. Asa result, it is very important that the hierarchical 16QAM mappingmodule 160 acquires an appropriate hierarchical value α in order toimprove stereoscopic 3D video quality based on a predetermined model.The appropriate hierarchical value α is acquired based on thepredetermined model for the PSNR.

In addition, a transmission symbol vector x_(n) _(m) is output byperforming the hierarchical 16QAM based on the acquired hierarchicalvalue α and the output transmission symbol vector x_(n) _(m) istransmitted to the destination node 20.

As illustrated in FIG. 1, the destination node 20 may include ahierarchical 16QAM de-mapper 210, an iterative channel decoder 220, anda H264/AVC decoder 230.

A reception symbol vector y arriving at the destination node 20 istransmitted to the hierarchical 16QAM de-mapper 210, the hierarchical16QAM de-mapper 210 adds a predetermined Gaussian noise w to thereceived transmission symbol vector x, and the reception symbol vector yadded with the Gaussian noise w is represented by Equation 2 below.

That is, when the reception symbol vector y is y={y¹,y², . . . , y^(n)},

y=x+w  (Equation 2) is satisfied.

Herein, x=∪ _(n=1) ^(N) x ^(n)  (Equation 3) is satisfied and

herein, x^(n)={x_(n) ₁ , x_(n) ₂ , . . . , x_(n) _(m) }.

In addition, the hierarchical 16QAM de-mapper 210 operates each codewordbitstream ĉ_(k) ^(n), log-likelihood ratio (hereinafter, abbreviated asan LLR) as the reception symbol vector y of the received n-th NAL unitand the codeword bitstream ĉ_(k) _(n) , LLR is represented by Equation 4below.

{circumflex over (f)} _((α)) ¹⁶(y ^(n))=L(ĉ _(k′) ^(n))  Equation 4

Herein, k′ a is 1 and 12, f_((α)) ¹⁶( ) represents soft hierarchical16QAM de-mapping function, and L( ) represents an LLR value.

In addition, when the Gaussian noise w is defined as a probabilitydistribution function, Equation 5 below is satisfied.

$\begin{matrix}{{p(\omega)} = {\frac{1}{\sqrt{2{\pi\sigma}^{2}}}e^{\frac{- {({\omega - \mu})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 5}\end{matrix}$

Herein, μ=0 and a parameter is σ²=N₀/2.

Hereinafter, a process of operating the LLR for each bit of the codewordbitstream ĉ_(k) ^(n) of the NAL unit will be described.

For example, a first video bit to a fourth video bit b₁, b₂, b₃, and b₄in each constellation point are considered as two bits throughindependent 4 pulse amplitude modulation (PAM) for a real axis I and animaginary axis Q and the mapping for the hierarchical modulation isshown in Table below.

TABLE 1 Constellation mapping for hierarchical 16QAM b₁b₂ I b₃b₄ Q 11−d₁ − d₂ 11 −d₁ − d₂ 10 −d₁ + d₂ 10 −d₁ + d₂ 01  d₁ − d₂ 01  d₁ − d₂ 00 d₁ − d₂ 00  d₁ − d₂

Herein, b₁=c₁ ^((2m) ^(n) ⁻¹⁾ and b₃=c₁ ^(2m) ^(n) are HP codeword bitsand b₂=c₁₂ ^((2m) ^(n) ⁻¹⁾ and b₄=c₁₂ ^(2m) ^(n) are LP codeword bits.

For hierarchical 16QAM de-mapping, a probability P(b_(m)|y) to betransmitted with each video bit br (r=1, 2, 3, 4) for the givenreception symbol vector y of the NAL unit satisfies Equation 6 below.

$\begin{matrix}{{P\left( {b_{m}y} \right)} = \frac{{P\left( {b_{m}y} \right)}{p\left( b_{m} \right)}}{p(y)}} & {{Equation}\mspace{14mu} 6}\end{matrix}$

In this case, the maximum P(b_(m)|y) is the same as the maximumP(y|b_(m)) because all probabilities of the same constellation pointsare the same as each other.

FIG. 3 is a diagram showing a hierarchical 16QAM constellation mappingstate of each of the HP bits b₁ and b₃ and the LP bits b₂ and b₄.Referring to FIG. 3A, a process of drawing the HP bits b₁ and b₃ LLROperation Equation will be described. Herein, since the same rule isapplied to the HP bits b₁ and b₃, the HP bit b₁ LLR satisfies Equation 7below.

$\begin{matrix}{\frac{P\left( {{yb_{1}} = 0} \right)}{P\left( {{yb_{1}} = 1} \right)} = \frac{e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}} + e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}} + e^{\frac{- {({y - {({{- d_{1}} + d_{2}})}})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 7}\end{matrix}$

Herein, in a period 1 of y<−d₁, the HP bit b₁ LLR has a low contributionratio of a constellation point d₁+d₂ of a numerator and −d₁+d₂ of adenominator.

Accordingly, the LLR for the HP bit b₁ is represented by Equation 8below.

$\begin{matrix}{\frac{P\left( {{yb_{1}} = 0} \right)}{P\left( {{yb_{1}} = 1} \right)} \approx \frac{e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 8}\end{matrix}$

When both sides are summarized, the LLR for the HP bit b₁ may berepresented by Equation 9 below.

$\begin{matrix}\begin{matrix}{{\ln \left( \frac{P\left( {{yb_{1}} = 0} \right)}{P\left( {{yb_{1}} = 1} \right)} \right)} \approx {\ln \left( \frac{e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}}} \right)}} \\{{= {\frac{1}{2\sigma^{2}}\left\{ {\left( {y - \left( {{- d_{1}} - d_{2}} \right)} \right)^{2} - \left( {y - \left( {{- d_{1}} + d_{2}} \right)} \right)^{2}} \right\}}}} \\{{= {\frac{1}{\sigma^{2}}2{d_{1}\left( {y + d_{2}} \right)}}}}\end{matrix} & {{Equation}\mspace{14mu} 9}\end{matrix}$

In addition, in Periods 2 and 3 of d₁<y<+d₁, since d₁+d₂ of thenumerator and −d₁−d₂ of the denominator have small values enough to benegligible, the HP bit b₁ LLR may be represented by Equation 10 below.

$\begin{matrix}{\frac{P\left( {{yb_{1}} = 0} \right)}{P\left( {{yb_{1}} = 1} \right)} \approx \frac{e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 10}\end{matrix}$

When both sides of Equation 18 are logarized and summarized, the HP bitb₁ LLR is represented by Equation 11 below.

$\begin{matrix}\begin{matrix}{{\ln \left( \frac{P\left( {{yb_{1}} = 0} \right)}{P\left( {{yb_{1}} = 1} \right)} \right)} \approx} & {{\ln \left( \frac{e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}}} \right)}} \\{=} & {{\frac{1}{2\sigma^{2}}\left\{ {\left( {y - \left( {{- d_{1}} + d_{2}} \right)} \right)^{2} -} \right.}} \\ & \left. \left( {y - \left( {{- d_{1}} - d_{2}} \right)} \right)^{2} \right\} \\{=} & {{\frac{1}{\sigma^{2}}2{y\left( {d_{1} - d_{2}} \right)}}}\end{matrix} & {{Equation}\mspace{14mu} 11}\end{matrix}$

Meanwhile, in Period 4 of y≥+d₁, since d₁−d₂ of the numerator and −d₁−d₂of the denominator have small values enough to be negligible, the HP bitb₁ LLR may be represented by Equation 12 below.

$\begin{matrix}{\frac{P\left( {{yb_{1}} = 0} \right)}{P\left( {{yb_{1}} = 1} \right)} \approx \frac{e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} + d_{2}})}})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 12}\end{matrix}$

In addition, when both sides of the HP bit b₁ LLR are logarized andsummarized, the HP bit b₁ LLR may be represented by Equation 13 below.

$\begin{matrix}\begin{matrix}{{\ln \left( \frac{P\left( {{yb_{1}} = 0} \right)}{P\left( {{yb_{1}} = 1} \right)} \right)} \approx} & {{\ln \left( \frac{e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} + d_{2}})}})}^{2}}{2\sigma^{2}}}} \right)}} \\{=} & {{\frac{1}{2\sigma^{2}}\left\{ {\left( {y - \left( {{- d_{1}} + d_{2}} \right)} \right)^{2} -} \right.}} \\ & \left. \left( {y - \left( {d_{1} + d_{2}} \right)} \right)^{2} \right\} \\{=} & {{\frac{1}{\sigma^{2}}2{d_{1}\left( {y - d_{2}} \right)}}}\end{matrix} & {{Equation}\mspace{14mu} 13}\end{matrix}$

Accordingly, the HP codeword bit ĉ_(k) ^(n), LLR L(ĉ₁ ^(n))={L(c₁ ^(n) ¹), L(c₁ ^(n) ² ), . . . , L(c₁ ^(n) ^(m) )} satisfies Equation 14 below.

$\begin{matrix}{{L\left( {\hat{c}}_{1}^{n} \right)} = \left\{ \begin{matrix}{{\frac{1}{\sigma^{2}}2{d_{1}\left( {y^{n} + d_{2}} \right)}},} & {{{if}\mspace{14mu} y^{n}} < {- d_{1}}} \\{{\frac{1}{\sigma^{2}}2{y^{n}\left( {d_{1} - d_{2}} \right)}},} & {{{if}\mspace{14mu} - d_{1}} \leq y^{n} < d_{1}} \\{{\frac{1}{\sigma^{2}}2{d_{1}\left( {y^{n} - d_{2}} \right)}},} & {{{if}\mspace{14mu} y^{n}} \geq d_{1}}\end{matrix} \right.} & {{Equation}\mspace{14mu} 14}\end{matrix}$

Herein, 1≤n≤N, that is, n is a positive integer.

Referring to FIG. 3B, a process of operating the LP bits b₂ and b₄ LLRis as follows. Herein, since the same rule is applied to the LP bit b₂and the LP bit b₄, the HP bit b₂ LLR satisfies Equation 15 below.

$\begin{matrix}{\frac{P\left( {{yb_{2}} = 0} \right)}{P\left( {{yb_{2}} = 1} \right)} \approx \frac{e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}} + e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}} + e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 15}\end{matrix}$

Herein, in Periods 1 and 2 of y<0, since the constellation point d₁+d₂of the numerator and d_(i)−d₂ of the denominator of the LP bit b₁ LLRhave small values enough to be negligible, the LP bit b₁ LLR isrepresented by Equation 16 below.

$\begin{matrix}{\frac{P\left( {{yb_{2}} = 0} \right)}{P\left( {{yb_{2}} = 1} \right)} \approx \frac{e^{\frac{- {({y - {({{- d_{1}} + d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 16}\end{matrix}$

When both sides of the LP bit b₂ LLR are logarized and summarized, theLP bit b₂ LLR is represented by Equation 17 below.

$\begin{matrix}\begin{matrix}{{\ln \left( \frac{P\left( {{yb_{2}} = 0} \right)}{P\left( {{yb_{2}} = 1} \right)} \right)} \approx} & {{\ln \left( \frac{e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({{- d_{1}} - d_{2}})}})}^{2}}{2\sigma^{2}}}} \right)}} \\{=} & {{\frac{1}{2\sigma^{2}}\left\{ {\left( {y - \left( {{- d_{1}} - d_{2}} \right)} \right)^{2} -} \right.}} \\ & \left. \left( {y - \left( {{- d_{1}} + d_{2}} \right)} \right)^{2} \right\} \\{=} & {{\frac{1}{\sigma^{2}}2{d_{2}\left( {y + d_{1}} \right)}}}\end{matrix} & {{Equation}\mspace{14mu} 17}\end{matrix}$

Herein, in Periods 3 and 4 of y≥0, since the constellation point −d₁+d₂of the numerator and −d₁−d₂ of the denominator of the LP bit b₂ LLR havesmall values enough to be negligible, the LP bit b₂ LLR is representedby Equation 18 below.

$\begin{matrix}{\frac{P\left( {{yb_{2}} = 0} \right)}{P\left( {{yb_{2}} = 1} \right)} \approx \frac{e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}}}} & {{Equation}\mspace{14mu} 18}\end{matrix}$

In addition, when both sides of the LP bit b₂ LLR are logarized andsummarized, the LP bit b₂ LLR satisfies Equation 19 below.

$\begin{matrix}\begin{matrix}{{\ln \left( \frac{P\left( {{yb_{2}} = 0} \right)}{P\left( {{yb_{2}} = 1} \right)} \right)} \approx} & {{\ln \left( \frac{e^{\frac{- {({y - {({d_{1} - d_{2}})}})}^{2}}{2\sigma^{2}}}}{e^{\frac{- {({y - {({d_{1} + d_{2}})}})}^{2}}{2\sigma^{2}}}} \right)}} \\{=} & {{\frac{1}{2\sigma^{2}}\left\{ {\left( {y - \left( {d_{1} + d_{2}} \right)} \right)^{2} -} \right.}} \\ & \left. \left( {y - \left( {d_{1} - d_{2}} \right)} \right)^{2} \right\} \\{=} & {{\frac{1}{\sigma^{2}}2{d_{2}\left( {{- y} + d_{1}} \right)}}}\end{matrix} & {{Equation}\mspace{14mu} 19}\end{matrix}$

Accordingly, the LP bit ĉ_(k) ^(n), LLR L(ĉ₁₂ ^(n))={L(c₁₂ ^(n) ¹ ),L(c₁₂ ^(n) ² ), . . . , L(c₁₂ ^(n) ^(m) )} satisfies Equation 20 below.

$\begin{matrix}{{L\left( {\hat{c}}_{12}^{n} \right)} = \left\{ \begin{matrix}{{{\frac{1}{\sigma^{2}}2{d_{2}\left( {y^{n} + d_{1}} \right)}},}\mspace{14mu}} & {{{if}\mspace{14mu} y^{n}} < 0} \\{{\frac{1}{\sigma^{2}}2{d_{2}\left( {{- y^{n}} + d_{1}} \right)}},} & {{{if}\mspace{14mu} y^{n}} \geq 0}\end{matrix} \right.} & {{Equation}\mspace{14mu} 20}\end{matrix}$

As illustrated in Equations 14 and 20, it can be seen that the LLRoperation complexity of each of the HP bit and the LP bit is low throughlogarization for the probability P(b_(m)|y) that the bit br (r=1, 2, 3,4) for the given reception symbol vector y is to be transmitted, and asa result, a de-mapping processing speed for the reception symbol vectory is improved.

In addition, since the codeword LLR L(ĉ₁₂ ^(n)) is L(ĉ_(k′)^(n)r)={L({circumflex over (b)}_(k′) ^(n)), L({circumflex over (p)}_(k′)^(n))} and k′=1, 12, the hierarchical 16QAM de-mapper 210 outputs fourde-mapped video bitstreams and four parity bitstream LLRs L({circumflexover (b)}₁ ^(n)), L({circumflex over (b)}₁₂ ^(n)), L({circumflex over(p)}₁ ^(n)) and L({circumflex over (p)}₁₂ ^(n)) and the four de-mappedvideo bitstreams and the parity bitstream LLRs L({circumflex over (b)}₁^(n)), L({circumflex over (b)}₁₂ ^(n)), L({circumflex over (p)}₁ ^(n)),and L({circumflex over (p)}₁₂ ^(n)) are transmitted to the iterativechannel decoder 220.

FIG. 4 is a diagram showing a configuration of the iterative channeldecoder 220 of FIG. 1 in detail. Referring to FIG. 4, the iterativechannel decoder 220 may include a first soft in soft out (SISO) decoder221, an interleaver 222, a first LLR operator 223, a second SISO decoder224, a second LLR operator 225, an deinterleaver 226, and an exclusiveOR operator 227. Herein, the iterative channel decoder 220 repeats anddecodes the output of the first SISO decoder 221 and the second SISOdecoder 224.

That is, the first SISO decoder 221 outputs an additional bitstream LLRL_(e) ⁽¹⁾({circumflex over (b)}₁ ^(n)) by inputting the video bitstreamLLR L({circumflex over (b)}₁ ^(n)) and the parity bitstream LLRL({circumflex over (p)}₁ ^(n)). Herein, L_(e) ^((j)) is defined asextrinsic information (EI) during j-th half for an iteration.

In addition, the additional bitstream LLR L_(e) ⁽¹⁾({circumflex over(b)}₁ ^(n)) of the first SISO decoder 221 is transmitted to theinterleaver 222 and the interleaver 222 rearranges the sequence of theadditional bitstream LLR L_(e) ⁽¹⁾({circumflex over (b)}₁ ^(n)) and thenoutputs an interleaved additional bitstream LLR L_(e) ⁽¹⁾({circumflexover (b)}₁ ^(n)), in which the interleaved additional bitstream LLRL_(e) ⁽¹⁾({circumflex over (b)}₁ ^(n)) is defined as Π(L_(e)⁽¹⁾({circumflex over (b)}₁ ^(n))).

As a result, the additional bitstream is generated by using the videobitstream and the parity bitstream by the first SISO decoder 221 and theinterleaver 222 rearranges the sequence of the additional bitstream byusing the generated additional bitstream to output the interleavedadditional bitstream.

Further, the interleaved additional bitstream LLR L_(e) ⁽¹⁾({circumflexover (b)}₁ ^(n))′ and the combined bitstream LLR L({circumflex over(b)}₁₂ ^(n)) are transmitted to the first LLR operator 223, and thefirst LLR operator 223 combines the interleaved additional bitstream LLRL_(e) ⁽¹⁾({circumflex over (b)}₁ ^(n))′ and the combined bitstream LLRL({circumflex over (b)}₁₂ ^(n)) based on the LLR to generate a priorbitstream (Priori bit) LLR L_(α) ⁽¹⁾({circumflex over (b)}₂ ^(n)).Herein, with respect to the interleaved additional bitstream LLR L_(e)⁽¹⁾({circumflex over (b)}₁ ^(n))′=Π(L_(e) ⁽¹⁾({circumflex over (b)}₁^(n))), an exclusive OR is defined as L({circumflex over (b)}₁ ^(n))

L({circumflex over (b)}₁₂ ^(n))

L({circumflex over (b)}₁ ^(n)⊕{circumflex over (b)}₁₂ ^(n)).

As a result, during the first half for an iteration decoding, the priorbitstream LLR L_(α) ⁽¹⁾({circumflex over (b)}₂ ^(n)) and the de-mappedparity bitstream LLR L({circumflex over (p)}₁₂ ^(n)) are transmitted tothe second SISO decoder 224 and the second SISO decoder 224 performssoft-decoding of the received prior bitstream LLR L_(α) ⁽¹⁾({circumflexover (b)}₂ ^(n)) and the de-mapped parity bitstream LLR L({circumflexover (p)}₁₂ ^(n)).

Thereafter, during the second half for an iteration decoding, the SISOdecoder 224 generates an additional bitstream LLR L_(e) ⁽²⁾({circumflexover (b)}₂ ^(n)) which is the EI for the prior bitstream LLR L_(α)⁽¹⁾({circumflex over (b)}₂ ^(n)) and the additional bitstream LLR L_(e)⁽²⁾({circumflex over (b)}₂ ^(n)) is transmitted to the first SISOdecoder 221 as prior information via the second LLR operator 225 and thedeinterleaver 226 in sequence. As a result, the prior bitstream LLRL_(α) ⁽²⁾({circumflex over (b)}₁ ^(n)) transmitted to the first SISOdecoder 221 is defined as L_(α) ⁽²⁾({circumflex over (b)}₁^(n))=Π⁻¹(L_(e) ⁽²⁾({circumflex over (b)}₂ ^(n))

L({circumflex over (b)}₁₂ ^(n))) and herein, Π⁻¹( ) is an deinterleaver.The channel decoding process is repetitively performed predeterminedtimes. As a result, the video bitstream LLR L({circumflex over (b)}₁^(n)) is updated by the prior bitstream LLR L_(α) ⁽²⁾({circumflex over(b)}₁ ^(n)) and transmitted to the first SISO decoder 221, therebyimproving reliability for the video bitstream LLR L({circumflex over(b)}₁ ^(n)).

In addition, video bitstreams {circumflex over (b)}₁ ^(n) and{circumflex over (b)}₂ ^(n) of the first SISO decoder 221 and the secondSISO decoder 224 are output.

The prior information API of the additional bit LLR L_(e)⁽¹⁾({circumflex over (b)}₁ ^(n)) of the first SISO decoder 221 istransmitted to the next first SISO decoder 221 from the video bitstreamLLR L({circumflex over (b)}₁ ^(n)) and the parity bitstream LLRL({circumflex over (p)}₁ ^(n)), thereby improving the reliability forthe video bitstream LLR L({circumflex over (b)}₁ ^(n)).

As a result, in the present invention, it is required to set theappropriate hierarchical value α for improving the reliability for thevideo bit {circumflex over (b)}₁ ^(n) and the combined bit {circumflexover (b)}₁₂ ^(n) at the same time.

The video bits {circumflex over (b)}₁ ^(n) and {circumflex over (b)}₂^(n) of the iterative channel decoder 220 are transmitted to theH264/AVC decoders 230 and 231, respectively, and the H264/AVC decoders231 and 232 decode the video bits {circumflex over (b)}₁ ^(n) and{circumflex over (b)}₂ ^(n) to reconfigure the left and right videosignals {circumflex over (V)}₁ and {circumflex over (V)}₂. In this case,the decoded video bits {circumflex over (b)}₁ ^(n) and {circumflex over(b)}₂ ^(n) are defined as the left and right video signals {circumflexover (V)}₁ and {circumflex over (V)}₂, and the left video signal{circumflex over (V)}₁ provides a legacy 2DTV (display device) serviceand is combined with the reconfigured right video signal {circumflexover (V)}₂ to provide a 3DTV service.

Hereinafter, with respect to the left and right video signals{circumflex over (V)}₁ and {circumflex over (V)}₂ acquired through theiterative channel decoding for the symbol vector y received from thedestination node 20, a series of processes of updating the hierarchicalvalue α in the model constructed in the source node 10 by acquiring theappropriate hierarchical value α based on the PSNR performance in thelow SNR environment will be described.

That is, the quality of the left and right video signals {circumflexover (V)}₁ and {circumflex over (V)}₂ reconfigured in the destinationnode 20 is measured by the peak signal to noise ratio (PSNR) and thestereoscopic 3D video quality is measured based on the average PSNR. Theaverage PSNR performance is determined by bit error rate (BER)performance and the average PSNR performance is determined depending onthe hierarchical value α.

Herein, the average PSNR for the left and right video signals{circumflex over (V)}₁ and {circumflex over (V)}₂ is represented byEquation 21 below.

$\begin{matrix}{{{PSNR}_{Avg}\left( {\hat{V}}_{\alpha} \right)} = {\frac{1}{K}\Sigma_{k}^{K}{{PSNR}\left( {\hat{V}}_{k,\alpha} \right)}}} & {{Equation}\mspace{14mu} 21}\end{matrix}$

Herein, k is 1 and 2, PSNR({circumflex over (V)}_(k,α)) is defined as ak-th video PSNR of the given hierarchical value α, and PSNR({circumflexover (V)}_(k,α)) is defined as Equation 22 below.

$\begin{matrix}{{{PSNR}\left( {\hat{V}}_{k,\alpha} \right)} = {\frac{1}{I}{\sum\limits_{i = 1}^{I}\; {10{\log_{10}\left( \frac{{MAX}^{2}}{{MSE}_{k}(i)} \right)}}}}} & {{Equation}\mspace{14mu} 22}\end{matrix}$

Herein, I represents a total number of frames and MAX represents aprobable maximum pixel value in one frame. For example, in the case of 8bits per one sample, a probable maximum pixel value is 255.

In addition, MSE_(k)(i) is defined as a mean squared error (MSE) in anI-th frame of the k-th video and MSE_(k)(i) satisfies Equation 23 below.

$\begin{matrix}{{MSE} = {\frac{1}{W \times H}{\sum\limits_{w = 1}^{W}\; {\sum\limits_{h = 1}^{H}\; \left( {{{ori}\left( {w,h} \right)} - {{rec}\left( {w,h} \right)}} \right)^{2}}}}} & {{Equation}\mspace{14mu} 23}\end{matrix}$

Herein, ori and rec represent an original frame and a reconfiguredframe, and Wand H represent a height and a width of the frame.

If such an average PSNR exceeds the target PSNR and the PSNR of eachvideo does not reach a minimum required value, a low-qualitystereoscopic 3D video is viewed. For example, when the target averagePSNR is set as 30 dB, a sum of the left and right PSNRs needs to exceed60 dB to reach the target average PSNR. If the left and right PSNRs are40 dB and 20 dB, respectively, the target average PSNR is satisfied, butthe quality of the stereoscopic 3D video is gradually deterioratedbecause the right video has a low PSNR.

As a result, the left video and right video average PSNRs need to exceedthe minimum required PSNR, and the sum of the left video and right videoaverage PSNRs needs to acquire the hierarchical value α exceeding thetarget average PSNR from a predetermined model.

Accordingly, the average PSNR for the left and right video signals{circumflex over (V)}₁ and {circumflex over (V)}₂ needs to satisfyEquations 24 to 26 below.

$\begin{matrix}{\arg \; {\max\limits_{\alpha}{{PSNR}_{Avg}\left( {\hat{V}}_{\alpha} \right)}}} & {{Equation}\mspace{14mu} 24}\end{matrix}$Herein, NR _(Avg)({circumflex over (V)} _(α))≥PSNR_(Avg) ⁺({circumflexover (V)} _(α)),∀α  Equation 25

PSNR({circumflex over (V)} _(k,α))≥PSNR⁻({circumflex over (V)}_(k,α)),k=1,2,∀α  Equation 26

Herein, PSNR_(Avg) ⁺ and PSNR⁻ represent the target average PSNR of theleft and right videos and the minimum required PSNR, respectively.

In this case, the left video and right video average PSNRs need toexceed the minimum required PSNR and the sum of the left video and rightvideo average PSNRs a model for acquiring the hierarchical value α inwhich the sum of the left video and right video average PSNRs exceedsthe target average PSNR is constructed as follows.

FIG. 5 is a diagram showing BER performance in the case of repeating thechannel decoding of the decoded bit {circumflex over (b)}₁ ^(n) (leftvideo, HP bit) and bit {circumflex over (b)}₂ ^(n) (right video, LP bit)three times. Referring to (a), it can be seen that when the hierarchicalvalue α is equal to or more than 0.8, the BER performance of the HPstream of the left video {circumflex over (b)}₁ using the hierarchical16QAM mapping model is higher than that of a general 16 QAM mappingmodel. Referring to (b), it can be seen that when the hierarchical valueα is less than 0.8, the BER performance of the HP stream of the leftvideo {circumflex over (b)}₁ using the hierarchical 16QAM mapping modelis lower than that of a general 16 QAM mapping model. As a result, theBER performance of the HP bit is improved as the hierarchical value α isincreased and the BER performance of the LP bit is improved as thehierarchical value α is decreased. However, the BER of the LP bitdecoded by the second SISO decoder 224 directly affects the reliabilityof the HP bit decoded by the first SISO decoder 221. Accordingly, asillustrated in (b), the BER of the LP bit is degraded when thehierarchical value α is between 0.1 to 0.2.

That is, when the hierarchical value α is between 0.1 to 0.2, the BERperformance of the LP bit is excessively decreased and the LP bit LLRextracted by the network decoding causes the decrease in performance,and it may be represented by a Relation Equation 27 below.

L({circumflex over (b)} ₁ ^(n))

({circumflex over (b)} ₁₂ ^(n))=L({circumflex over (b)} ₂^(n))  Equation 27

As a result, when the minimum required PSNR is set to 28 dB and thetarget average PSNRs are set to 33 dB and 38 dB, respectively, the PSNRof 28 dB represents the low quality of the reconfigured video, the PSNRof 38 dB represents the high quality of the reconfigured video, and thePSNR of 33 dB is considered as intermediate quality of the reconfiguredvideo.

FIG. 6 (a) is an exemplary diagram illustrating leftmost, middle, andrightmost PSNR performance when E_(b)/N₀=6 dB, and the hierarchicalvalue α of the PSNR of the left video satisfies the minimum requiredPSNR as a value except for 0.1 to 04, while the hierarchical value α ofthe right video PSNR satisfies the minimum required PSNR as 0.2 to 0.5,but herein, a value on an X axis represents a typical minimum requiredvalue of 16QAM.

However, it can be seen that even though the hierarchical value α isincreased further than the minimum required PSNR of the left and rightvideos, the average PSNRs of the left and right videos do not reach thetarget average PSNR.

(b) is an exemplary diagram showing PSNR performance when E_(b)/N₀=6.5dB, and it can be seen that most of hierarchical values α except for 0.1to 0.3 satisfy the minimum required PSNR, while the hierarchical valuesα of 0.2 to 0.6 with respect to the PSNR of the right video issatisfied. As illustrated in the average PSNR of FIG. 6B, it can be seenthat the hierarchical values α of 0.5 and 0.6 are increased comparedwith the target average PSNR set to 38 dB. As compared with the general16QAM having the hierarchical values α of 0.5 and 0.6, the average PSNRis increased by about 7.3 dB to 9.3 dB.

Accordingly, it can be seen that when E_(b)/N₀=6 dB to 6.5 dB, thehierarchical value α is 0.5 to 0.6.

FIG. 7 is a diagram showing average PSNR performance of left and rightvideos for a hierarchical value α every period of 0.025 between 0.5 and0.6. Referring to (a), it can be seen that in a lower test sequence thana low motion sequence, when E_(b)/N₀=6.3 dB, some or partial targetaverage PSNR is not satisfied.

Meanwhile, referring to (b), when E_(b)/N₀=6.4 dB, the hierarchicalvalues α of 0.525 and 0.55 reach the target average PSNR and have thesame performance even when the target average PSNR is 38 dB. Similarly,when the target average PSNR is set to 33 dB, as illustrated in FIG. 8,it can be seen that the hierarchical value α of 0.5 satisfies the targetaverage PSNR at E_(b)/N₀=6.1 dB.

As a result, in order to acquire the high-quality stereoscopic video ina low SNR environment, the hierarchical values α of 0.525 and 0.55 areselected, and in order to acquire the intermediate-quality stereoscopicvideo in a low SNR environment, the hierarchical value α of 0.5 isselected.

Accordingly, it can be seen that the LLR operation complexity of each ofthe HP bitstream and the LP bitstream is low through logarization forthe probability P(b_(m)|y) that the video bit br (r=1, 2, 3, 4) for thegiven reception symbol vector y is to be transmitted, and as a result, ade-mapping processing speed for the reception symbol vector y isimproved.

Further, the prior information API of the additional bit LLR L_(e)⁽¹⁾({circumflex over (b)}₁ ^(n)) of the first SISO decoder 221 istransmitted to the next first SISO decoder 221 from the video bitstreamLLR L({circumflex over (b)}₁ ^(n)) and the parity bitstream LLRL({circumflex over (p)}₁ ^(n)), thereby improving the reliability forthe video bitstream LLR L({circumflex over (b)}₁ ^(n)).

Meanwhile, according to another aspect of the present invention, amethod for broadcasting a stereoscopic 3D video may include atransmission step of transmitting a left video and a right videocollected by a plurality of cameras in a transmission symbol vector formby performing 16QAM modulation and hierarchical modulation based onhierarchical values set from a predetermined model after compressing theleft video and the right video; and a reception step of acquiring theleft video and the right video by performing iterative channel decodingafter performing hierarchical 16QAM de-mapping based on an appropriatehierarchical value and transmitting the acquired left and right videosto a display device with respect to a reception symbol vector in whichGaussian noise is added to the transmission symbol vector at a sourcenode side. The process of performing the hierarchical 16QAM de-mappingbased on the predetermined hierarchical value may include providing eachoperation relation of a LP codeword bitstream LLR and a HP codewordbitstream LLR drawn through logarization for the probability that thereceived reception symbol vector is to be transmitted as the fourfundamental arithmetic operations, in order to reduce operationcomplexity of the LP codeword bitstream LLR and the HP codewordbitstream LLR.

Further, the iterative channel decoding process may include generatingan additional bit stream by performing soft decoding by the first SISOdecoder by inputting a left video bitstream and a parity bitstream;rearranging a sequence of the additional bitstream and then transmittingthe rearranged sequence to the second SISO decoder as an input;performing soft decoding by inputting the additional bitstreamrearranged in the second SISO decoder and the parity bit; generating aprior bitstream of the left video after inverse-arranging the sequencethrough deinterleaving for the additional bitstream; and updating theleft video bitstream by providing the prior bitstream of the left videoof the deinterleaver to the first SISO decoder through an exclusive ORoperation to improve reliability of the decoding for the left video.

In addition, the process of acquiring the appropriate hierarchical valuemay include acquiring bit error rate (BER) performance based on noisefor each predetermined hierarchical value of left and right videobitstreams output from the first and second SISO decoders; setting ahierarchical value having the acquired low BER performance; drawing anaverage PSNR for each of the left video bitstream and the right videobitstream reconfigured based on the predetermined hierarchical value;and acquiring, as the appropriate hierarchical value, a hierarchicalvalue in which a sum of the drawn left video bitstream and right videobitstream exceeds a predetermined target average PSNR and each averagePSNR has a predetermined minimum required PSNR. The detailed abstractionwill be omitted as a function in which each step of the method forbroadcasting the stereoscopic 3D video is performed in the source node10 and the destination node 20 described above.

According to the apparatus and the method for broadcasting thestereoscopic 3D video, the LLR operation of each of the HP bitstream andthe LP bitstream is provided by the four fundamental arithmeticoperations through the logarization for the probability that a video bitfor the reception symbol vector is to be transmitted, thereby loweringthe operation complexity of the HP bitstream LLR and the LP bitstreamLLR and improving the de-mapping processing speed for the receptionsymbol vector y. When performing the iterative channel decoding, theiterative channel decoding is performed by acquiring, as the appropriatehierarchical value, a hierarchical value in which a sum of the drawnleft video bitstream and right video bitstream exceeds a predeterminedtarget average PSNR and each average PSNR has a predetermined minimumrequired PSNR, thereby displaying a high-quality stereoscopic video. Inaddition, the left video bitstream is updated by providing the priorbitstream of the left video to the first SISO decoder, thereby improvingreliability of the decoding for the left video. Therefore, the presentinvention is the industrially available invention in that it is possibleto make a very great improvement in terms of performance efficiency aswell as accuracy of the operation and reliability, a possibility thatthe broadcasting system is commercially available is sufficient and thepresent invention may be practically clearly implemented.

A number of exemplary embodiments have been described above.Nevertheless, it should be understood that various modifications may bemade to these exemplary embodiments. For example, suitable results maybe achieved if the described techniques are performed in a differentorder and/or if components in a described system, architecture, device,or circuit are combined in a different manner and/or replaced orsupplemented by other components or their equivalents. Therefore, thescope of the present invention should not be limited to the exemplaryembodiment and should be defined by the appended claims to be describedbelow and equivalents to the appended claims.

What is claimed is:
 1. An apparatus for broadcasting a stereoscopic 3Dvideo, the apparatus comprising: a source node that transmits a leftvideo and a right video collected by a plurality of cameras in atransmission symbol vector form by performing 16QAM modulation andhierarchical modulation based on hierarchical values set from apredetermined model after compressing the left video and the rightvideo; and a destination node that acquires the left video and the rightvideo by performing iterative channel decoding after performinghierarchical 16QAM de-mapping based on a predetermined hierarchicalvalue and transmits the acquired left and right videos to a displaydevice with respect to a reception symbol vector in which Gaussian noiseis added to the transmission symbol vector at the source node side. 2.The apparatus of claim 1, wherein the source node includes: an IL-FECchannel encoding unit that generates a combined video bitstream b₁₂ bycombining compressed left video bitstream b₁ and right video bitstreamb₂ of NAL units and performing an exclusive OR operation with respect tothe left video V₁ and the right video V₂ collected through the pluralityof cameras; an RSC encoding unit including a plurality of RSC encodersthat output parity bitstreams P₁ and P₂ of the left video and the rightvideo by performing RSC encoding for the compressed left video bitstreamand right video bitstream; a concatenate vector generation module thatgenerates a codeword bitstream c₁ of the left video and a codewordbitstream c₁₂ of the combined video by concatenating the left videobitstream b₁, the right video bitstream b₂, the parity bitstream P₂ ofthe right video, and the combined video bitstream b₁₂ and outputs thegenerated codeword bitstream c₁ of the left video and codeword bitstreamc₁₂ of the combined video to a HP bitstream and a LP bitstream,respectively; and a hierarchical 16QAM mapping module that maps thereceived HP bitstream and LP bitstream after performing both 16 QAM andhierarchical modulation based on the hierarchical value set from thepredetermined model to transmit the mapped HP bitstream and LP bitstreamto the destination node in a transmission symbol vector form.
 3. Theapparatus of claim 2, wherein the IL-FEC channel encoding unit includesan interleaver that combines the compressed left video bitstream andright video bitstream; and an exclusive OR operator that outputs acombined video bitstream by operating an exclusive OR with respect tothe output bitstream and the right video bitstream of the interleaver.4. The apparatus of claim 3, wherein the destination node includes: ahierarchical 16QAM de-mapper that acquires the hierarchical value andperforms the hierarchical 16QAM de-mapping based on the acquiredhierarchical value, and then outputs a left video bitstream LLR, aparity bitstream LLR, a combined video bitstream LLR and a paritybitstream LLR by operating the HP codeword bitstream LLR and the LPcodeword bitstream LLR, with respect to the reception symbol vector inwhich Gaussian noise is added to the transmission symbol vector of thesource node side, respectively; an iterative channel decoder thatacquires a left video stream and a right video stream by performing apredetermined number of iterative channel decoding with respect to thegenerated left video bitstream LLR, parity bitstream LLR, combined videobitstream LLR and parity bitstream LLR; and an encoding unit including aplurality of encoders that transmits a left video and a right video to adisplay device after compressing and encoding the acquired left andright video bitstreams, respectively.
 5. The apparatus of claim 4,wherein in the hierarchical 16QAM de-mapper, each operation relation ofa LP codeword bitstream LLR and a HP codeword bitstream LLR drawnthrough logarization for the probability that the received receptionsymbol vector is to be transmitted is provided by the four fundamentalarithmetic operations, in order to reduce operation complexity of the LPcodeword bitstream LLR and the HP codeword bitstream LLR.
 6. Theapparatus of claim 5, wherein the iterative channel decoder includes afirst SISO decoder that generates an additional bitstream LLR byperforming soft decoding by inputting the left video bitstream LLR andthe parity bitstream LLR and outputs the left video bitstream; aninterleaver that outputs an interleaved additional bitstream LLR byrearranging a sequence of the additional bitstream LLR of the first SISOdecoder; a first LLR operator that generates a prior bitstream of theright video by combining the interleaved additional bitstream and thecombined video bitstream as the input based on the LLR; a second SISOdecoder that generates an additional bitstream of the left video andoutputs the right video bitstream by soft decoding the prior bitstreamof the right video and the parity bitstream of the combined video of thefirst LLR operator as the input; a second LLR operator that generates anadditional bitstream of the left video by combining the additionalbitstream of the right video of the second SISIO decoder and thecombined video bitstream based on the LLR; a deinterleaver thatgenerates a prior bitstream of the left video through deinterleaving andexclusive OR operation with respect to the additional bitstream of theleft video; and an exclusive OR operator that updates the left videobitstream by providing the prior bitstream of the left video of thedeinterleaver to the first SISO decoder through the exclusive ORoperation to improve reliability of the decoding for the left video. 7.The apparatus of claim 6, wherein the hierarchical value is provided toacquire bit error rate (BER) performance based on noise for eachpredetermined hierarchical value of left and right video bit streamsoutput from the first and second SISO decoders of the iterative channeldecoder, set a hierarchical value having the acquired low BERperformance, draw an average PSNR for each of the left video bitstreamand the right video bitstream reconfigured based on the predeterminedhierarchical value, and acquire, as the appropriate hierarchical value,a hierarchical value in which a sum of the drawn left video bitstreamand right video bitstream exceeds a predetermined target average PSNRand each average PSNR has a predetermined minimum required PSNR.
 8. Anapparatus for broadcasting a stereoscopic 3D video, the apparatuscomprising: an IL-FEC channel encoding unit that generates a combinedvideo bitstream b₁₂ by combining compressed left video bitstream b₁ andright video bitstream b₂ of NAL units and performing an exclusive ORoperation with respect to the left video V₁ and the right video V₂collected through the plurality of cameras; an RSC encoding unitincluding a plurality of RSC encoders that output parity bitstreams P₁and P₂ of the left video and the right video by performing RSC encodingfor the compressed left video bitstream and right video bitstream,respectively; a concatenate vector generation module that generates acodeword bitstream c₁ of the left video and a codeword bitstream c₁₂ ofthe combined video by concatenating the left video bitstream b₁, theright video bitstream b₂, the parity bitstream P₂ of the right video,and the combined video bitstream b₁₂ and outputs the generated codewordbitstream c₁ of the left video and codeword bitstream c₁₂ of thecombined video to a HP bitstream and a LP bitstream, respectively; and ahierarchical 16QAM mapping module that maps the received HP bitstreamand LP bitstream after performing both 16 QAM and hierarchicalmodulation based on the hierarchical value set from the predeterminedmodel to transmit the mapped HP bitstream and LP bitstream to thedestination node in a transmission symbol vector form.
 9. The apparatusof claim 8, wherein the IL-FEC channel encoding unit includes aninterleaver that combines the compressed left video bitstream and rightvideo bitstream; and an exclusive OR operator that outputs a combinedvideo bitstream by operating an exclusive OR with respect to the outputbitstream and the right video bitstream of the interleaver.
 10. Anapparatus for broadcasting a stereoscopic 3D video, the apparatuscomprising: a hierarchical 16QAM de-mapper that acquires an appropriatehierarchical value, performs the hierarchical 16QAM de-mapping based onthe acquired hierarchical value, with respect to the reception symbolvector, and then outputs a left video bitstream LLR, a parity bitstreamLLR, a combined video bitstream LLR and a parity bitstream LLR byoperating the LP codeword bitstream LLR and the HP codeword bitstreamLLR, respectively; an iterative channel decoder that acquires a leftvideo stream and a right video stream by performing a predeterminednumber of iterative channel decoding with respect to the generated leftvideo bitstream LLR, parity bitstream LLR, combined video bitstream LLRand parity bitstream LLR; and an encoding unit including a plurality ofencoders that transmits a left video and a right video to a displaydevice after compressing and encoding the acquired left and right videobitstreams, respectively.
 11. The apparatus of claim 10, wherein in thehierarchical 16QAM de-mapper, each operation relation of a LP codewordbitstream LLR and a HP codeword bitstream LLR drawn through logarizationfor the probability that the received reception symbol vector is to betransmitted is provided by the four fundamental arithmetic operations,in order to reduce operation complexity of the LP codeword bitstream LLRand the HP codeword bitstream LLR.
 12. The apparatus of claim 11,wherein the iterative channel decoder includes a first SISO decoder thatgenerates an additional bitstream LLR by performing soft decoding byinputting the left video bitstream LLR and the parity bitstream LLR andoutputs the left video bitstream; an interleaver that outputs aninterleaved additional bitstream LLR by rearranging a sequence of theadditional bitstream LLR of the first SISO decoder; a first LLR operatorthat generates a prior bitstream of the right video by combining theinterleaved additional bitstream and the combined video bitstream as theinput based on the LLR; a second SISO decoder that generates anadditional bitstream of the left video and outputs the right videobitstream by soft decoding the prior bitstream of the right video andthe parity bitstream of the combined video of the first LLR operator asthe input; a second LLR operator that generates an additional bitstreamof the left video by combining the additional bitstream of the rightvideo of the second SISIO decoder and the combined video bitstream basedon the LLR; a deinterleaver that generates a prior bitstream of the leftvideo through deinterleaving and exclusive OR operation with respect tothe additional bitstream of the left video; and an exclusive OR operatorthat updates the left video bitstream by providing the prior bitstreamof the left video of the deinterleaver to the first SISO decoder throughthe exclusive OR operation to improve reliability of the decoding forthe left video.
 13. The apparatus of claim 12, wherein the hierarchicalvalue is provided to acquire bit error rate (BER) performance based onnoise for each predetermined hierarchical value of left and right videobit streams output from the first and second SISO decoders of theiterative channel decoder, set a hierarchical value having the acquiredlow BER performance, draw an average PSNR for each of the left videobitstream and the right video bitstream reconfigured based on thepredetermined hierarchical value, and acquire, as the appropriatehierarchical value, a hierarchical value in which a sum of the drawnleft video bitstream and right video bitstream exceeds a predeterminedtarget average PSNR and each average PSNR has a predetermined minimumrequired PSNR.
 14. A method for broadcasting a stereoscopic 3D video,the method comprising: transmitting a left video and a right videocollected by a plurality of cameras in a transmission symbol vector formby performing 16QAM modulation and hierarchical modulation based onhierarchical values set from a predetermined model after compressing theleft video and the right video; and acquiring the left video and theright video by performing iterative channel decoding after performinghierarchical 16QAM de-mapping based on an appropriate hierarchical valueand transmitting the acquired left and right videos to a display devicewith respect to a reception symbol vector in which Gaussian noise isadded to the transmission symbol vector at the source node side, whereinthe process of performing the hierarchical 16QAM de-mapping based on thepredetermined hierarchical value further includes providing eachoperation relation of a LP codeword bitstream LLR and a HP codewordbitstream LLR drawn through logarization for the probability that thereceived reception symbol vector is to be transmitted as the fourfundamental arithmetic operations, in order to reduce operationcomplexity of the LP codeword bitstream LLR and the HP codewordbitstream LLR.
 15. The method of claim 14, wherein the iterative channeldecoding process includes generating an additional bitstream byperforming soft decoding by the first SISO decoder by inputting a leftvideo bitstream and a parity bitstream; rearranging a sequence of theadditional bitstream and then transmitting the rearranged sequence tothe second SISO decoder as an input; performing soft decoding byinputting the additional bitstream rearranged in the second SISO decoderand the parity bit; generating a prior bitstream of the left video afterinverse-arranging the sequence through deinterleaving for the additionalbitstream; and updating the left video bitstream by providing the priorbitstream of the left video of the deinterleaver to the first SISOdecoder through an exclusive OR operation to improve reliability of thedecoding for the left video.
 16. The method of claim 15, wherein theprocess of acquiring the appropriate hierarchical value includes:acquiring bit error rate (BER) performance based on noise for eachpredetermined hierarchical value of left and right video bitstreamsoutput from the first and second SISO decoders; setting a hierarchicalvalue having the acquired low BER performance; drawing an average PSNRfor each of the left video bitstream and the right video bitstreamreconfigured based on the predetermined hierarchical value; andacquiring, as the appropriate hierarchical value, a hierarchical valuein which a sum of the drawn left video bitstream and right videobitstream exceeds a predetermined target average PSNR and each averagePSNR has a predetermined minimum required PSNR.